Semiconductor circuits formed on semiconductor chips, or wafers, include a number of types of circuit elements, including, for example, resistors, capacitors, inductors, transistors, etc. These elements must be created on the semiconductor chip in a way that the value or performance of the element meets the requirements of the circuit in which they are included.
Any semiconductor material has certain characteristics, and some of these characteristics are such that an element constructed on the semiconductor will have a certain value that depends in whole or part upon the area occupied by the element. A number of elements, including resistors, capacitors and inductors, are thus typically created as geometric shapes of a size that, given the characteristics of the semiconductor, will result in a particular value specified by a desired circuit design.
For example, suppose a semiconductor has a sheet resistance of 300 ohms per square, i.e., when a current flows through an area of 1 micron by 1 micron on the semiconductor surface it is subjected to a resistance of 300 ohms (Ω). A resistor constructed with a width of 1 micron and a length of 10 microns would thus be expected to have a resistance of 3000Ω (or 3 kilohms (kΩ); 1000Ω=1 kΩ) since the current through the resistor flows through ten squares along the length of the resistor.
However, this expectation is based upon certain assumptions that often prove to be incorrect. For example, the physical dimensions of an element are susceptible to errors or variations in the manufacturing process, which may not be able to reliably or repeatedly make the precise dimensions determined to yield the desired value for the resistor. Suppose that a 3 kΩ resistor is desired, and that the actual dimensions of the desired 1 micron by 10 micron resistor vary by 0.03 microns in each direction. Depending upon the direction of such a variation, in one case the actual resistor may be 0.97 microns wide and 9.97 microns long, for a total area of 9.6709 squares and an actual resistance of 2901.27Ω, a variation of over 3 percent. Alternatively, the resistor may be 1.03 microns wide and 10.03 microns long, for a total area of 10.3309 squares and a resistance of 3099.27Ω, similarly over 3 percent different than the desired value. If the length and width vary by less than 0.03 microns, or the variations are in opposite directions, still other resistances in between these extremes will be obtained.
In addition to this problem of obtaining a precise absolute value for a resistor, it is sometimes even more desirable to obtain a precise ratio between the values of two resistors. For example, consider a case where a ratio of resistances of 1 to 1.7273 is needed. This can be achieved in theory in the conventional manner by constructing two resistors on the chip, one 1 micron wide and 10 microns long, and the other 1 micron wide and 17.273 microns long.
But suppose that due to the manufacturing process these dimensions are all eroded by 0.1 micron. The first resistor will be 0.9 microns long by 9.9 microns wide for an area of 8.91 squares, and the second resistor will be 0.9 microns long by 17.173 microns wide, for an area of 15.4557 squares. The resulting ratio between the two resistors is now 1.7346, rather than the desired 1.7273, an error of just over −0.42 percent. While this may seem small, such an error may be enough to degrade the accuracy or performance of the circuit on the semiconductor chip.
In addition, the resistance of a resistor may vary from what is expected due to variations in the “body resistance” of the material. This is typically due to variations in the thickness of the silicon layers used to make the resistors, as well as variations in the amount of doping material that is implanted in the silicon when manufacturing the resistors.
Still further, in building elements on a semiconductor chip, it is necessary to make connections to the material. For example, to build a poly-silicon resistor on a chip there must be contact holes, and sometimes different doping levels at each end, for the metal traces to make good contact. The contact holes and associated features introduce an “end effect,” which is typically an unwanted additional resistance in series with the intended resistance, and is thus to be added to the value of the resistance as designed. This additional resistance generally depends largely upon how accurately the contact holes are cut in the chip material; it also creates a difference or error from the desired value, creating a resistance higher than intended, and makes it hard to match dissimilar values precisely since the unwanted end effect resistance may not be precisely known.
Again, suppose that it is desired to build two resistors with a ratio of 1 to 1.7273, with one resistor being 1 kΩ and the other being 1.7273 kΩ Even if the resistors are built to the precise size to yield these values, if the “end effect” adds, for example, 100Ω to each value, then the ratio between what are effectively a 1.1 kΩ resistor and a 1.8273 kΩ resistor becomes 1.6612 rather than the desired 1.7273, an error of almost 4 percent. Again, this may significantly alter the desired performance of the circuit.
Still another issue is that the chip design process typically includes a “place and route” stage. This is typically performed automatically by software, and, as implied by the name, is composed of two steps, placement and routing. The first step, placement, involves deciding where the components in the circuit should be “placed” or located in what is generally a limited amount of space on the chip. This is followed by routing, in which it is determined where to locate the connections needed between the placed components. The routing step is intended to implement all the desired connections while following the rules and limitations of an intended manufacturing process.
The place and route steps are interrelated, as the location of the elements as determined by the placement step has subsequent effects upon the ability of the routing step to determine the connections between the elements. Thus, determining the optimum locations of the elements and their connections can be very complex in circuits with many elements of differing size.
These issues make it difficult to implement elements on semiconductor chips having precise values, and more specifically to implement multiple elements with precise ratios between their values.